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 Freescale Semiconductor, Inc.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Document order number: MPC17510 Rev 1.0, 03/2004
Advance Information 1.2 A 15 V H-Bridge Motor Driver IC
The 17510 is a monolithic H-Bridge designed to be used in portable electronic applications such as digital and SLR cameras to control small DC motors. The 17510 can operate efficiently with supply voltages as low as 2.0 V to as high as 15 V. Its low RDS(ON) H-Bridge output MOSFETs (0.45 typical) can provide continuous motor drive currents of 1.2 A and handle peak currents up to 3.8 A. It is easily interfaced to low-cost MCUs via parallel 5.0 V compatible logic. The device can be pulse width modulated (PWM-ed) at up to 200 kHz. This device contains an integrated charge pump and level shifter (for gate drive voltages), integrated shoot-through current protection (cross-conduction suppression logic and timing), and undervoltage detection and shutdown circuitry. The 17510 has four operating modes: Forward, Reverse, Brake, and Tri-Stated (High Impedance). Features * 2.0 V to 15 V Continuous Operation * Output Current 1.2 A (DC), 3.8 A (Peak) * 450 m RDS(ON) H-Bridge MOSFETs * 5.0 V TTL-/CMOS-Compatible Inputs * PWM Frequencies up to 200 kHz * Undervoltage Shutdown * Cross-Conduction Suppression * Pb-Free Packaging Designated by Suffix Code EJ
17510
1.2 A 15 V H-BRIDGE MOTOR DRIVER IC
Freescale Semiconductor, Inc...
MTB SUFFIX EJ (Pb-FREE) SUFFIX CASE 948K-01 24-LEAD TSSOP
ORDERING INFORMATION
Device MPC17510EJ/R2 Temperature Range (TA) -30C to 65C Package 24 TSSOPW
17510 Simplified Application Diagram
Simplified Application Diagram
5.0 V 17510 VDD C1L C1H C2L C2H CRES EN GIN IN1 IN2
15 V VM GOUT
OUT1
MOTOR
MCU
OUT2 GND
This document contains certain information on a new product. Specifications and information herein are subject to change without notice. (c) Motorola, Inc. 2004
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C2H C2L C1H C1L
GOUT
CRES
Charge Pump VM
VDD
LowVoltage Detector OUT1
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IN1 IN2
Level Shifter Predriver Control Logic
H-Bridge OUT2
EN GIN PGND
LGND
No Connect Figure 1. 17510 Simplified Internal Block Diagram
17510 2
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OUT1 LGND CRES NC OUT1 PGND NC VM IN1 IN2 C1H C1L
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
GIN VDD NC VM NC PGND OUT2 OUT2 EN GOUT C2H C2L
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TERMINAL FUNCTION DESCRIPTION
Terminal 1, 5 2 3 4, 7, 20, 22 17, 18 6, 19 8, 21 9 10 11 12 13 14 15 16 23 24 Terminal Name OUT1 LGND CRES NC OUT2 PGND VM IN1 IN2 C1H C1L C2L C2H GOUT EN VDD
GIN
Formal Name Output 1 Logic Ground Charge Pump Output Capacitor Connection No Connect Output 2 Power Ground Motor Drive Power Supply Input Control 1 Input Control 2 Charge Pump 1H Charge Pump 1L Charge Pump 2L Charge Pump 2H Gate Driver Output Enable Control Logic Supply Gate Driver Input Driver output 1 terminals. Logic ground.
Definition
Charge pump reservoir capacitor terminal. No connection to these terminals. Driver output 2 terminals. Power ground. Motor power supply voltage input terminals. Control signal input 1 terminal. Control signal input 2 terminal. Charge pump bucket capacitor 1 (positive pole). Charge pump bucket capacitor 1 (negative pole). Charge pump bucket capacitor 2 (negative pole). Charge pump bucket capacitor 2 (positive pole). Output gate driver signal to external MOSFET switch. Enable control signal input terminal. Control circuit power supply terminal. LOW = True control signal for GOUT terminal.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
17510 3
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MAXIMUM RATINGS All voltages are with respect to ground unless otherwise noted. Exceeding the ratings may cause a malfunction or permanent damage to the device.
Rating Motor Supply Voltage Charge Pump Output Voltage (Note 1) Logic Supply Voltage Signal Input Voltage (EN, IN1, IN2, GIN) Driver Output Current Continuous Peak (Note 2) ESD Voltage Human Body Model (Note 3) Machine Model (Note 4) Storage Temperature Operating Junction Temperature Operating Ambient Temperature Power Dissipation (Note 5) Thermal Resistance Soldering Temperature (Note 6) Notes 1. When supplied externally, connect via 3.0 k resistor. 2. TA = 25C, 10 ms pulse at 200 ms interval. 3. 4. 5. 6. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ). ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 ). TA = 25C, RJA = 120C/W, 37 mm x 50 mm Cu area (1.6 mm FR-4 PCB). Soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. VESD1 VESD2 TSTG TJ TA PD RJA TSOLDER 1900 130 -65 to 150 -30 to 150 -30 to 65 1.0 120 260 C C C W C/W C IO IOPK 1.2 3.8 V Symbol VM Value -0.5 to 16 -0.5 to 13 -0.5 to 6.0 -0.5 to VDD +0.5 Unit V V V V A
VC
RES
VDD VIN
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17510 4
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STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions TA = 25C, VM = 15 V, VDD = 5.0 V, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic Symbol Min Typ Max Unit
POWER
Motor Supply Voltage Logic Supply Voltage Capacitor for Charge Pump Standby Power Supply Current (Note 7) Motor Supply Standby Current Logic Supply Standby Current Logic Supply Current (Note 8) Low-Voltage Detection Circuit Detection Voltage (VDD) (Note 9) Detection Voltage (VM) Driver Output ON Resistance (Note 10) VM = 2.0 V, 8.0 V, 15 V VDDDET VMDET RDS(ON) - 0.45 0.55 1.5 4.0 2.5 5.0 3.5 6.0 I VMSTBY
DDSTBY
VM VDD C1, C2, C3
2.0 4.0 0.001
- - -
15 5.5 0.1
V V F
- - -
- 0.3 3.3
1.0 1.0 4.0
A mA mA V
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IV
IV
DD
GATE DRIVE
Gate Drive Voltage (Note 11) No Current Load Gate Drive Ability (Internally Supplied) I CRES = -1.0 mA VGOUThigh VGOUTlow V
VC VC
RES
V 12 13 13.5 V 10 11.2 - V CRES -0.5 LGND V CRES - 0.1 V CRES LGND+0.5
RESload
Gate Drive Output IOUT = -50 A IIN = 50 A LGND +0.1
CONTROL LOGIC
Logic Input Voltage (EN, IN1, IN2, GIN) Logic Input Function (4.0 V < VDD < 5.5 V) High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Low-Level Input Current EN/GIN Terminal Notes 7. Excluding pull-up resistor current, including current of gate-drive circuit. 8. fIN = 100 kHz. 9. 10. 11. Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold. When the gate V V voltage CRES is applied from an external source, CRES = 7.5 V. IO = 1.2 A source + sink. Input logic signal not present. VIH VIL IIH IIL IIL VDD x 0.7 - - -1.0 -200 - - - - -50 - VDD x 0.3 1.0 - - V V A A A VIN 0 -
VDD
V
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
17510 5
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DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions TA = 25C, VM = 15 V, VDD = 5.0 V, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic Symbol Min Typ Max Unit
INPUT (EN, IN1, IN2, GIN)
Pulse Input Frequency Input Pulse Rise Time (Note 12) Input Pulse Fall Time (Note 14) fIN tR tF - - - - - - 200 1.0 (Note 13) 1.0 (Note 13) kHz s s
OUTPUT
Propagation Delay Time Turn-ON Time Turn-ON Time Turn-OFF Time GOUT Output Delay Time (Note 15) Turn-ON Time Turn-OFF Time Charge Pump Circuit Oscillator Frequency Rise Time (Note 16) Low-Voltage Detection Time Notes 12. 13. 14. 15. 16. fOSC 100 - - 200 0.1 - 400 1.0 10 kHz ms ms tTON tTOFF - - - - 10 10 tPZH tPLH tPHL - - - 0.3 1.2 0.5 1.0 2.0 1.0 s s
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tVC
t
RESon
VDDDET
Time is defined between 10% and 90%. That is, the input waveform slope must be steeper than this. Time is defined between 90% and 10%. Load is 500 pF. Time to charge CRES to 11 V after application of VDD.
17510 6
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Timing Diagrams
VDDDETon IN1, IN2, EN (GIN) tPZH*, tPLH (tTON) OUTn (GOUT) 50% VDD 1.5 V tPHL (tTOFF) 90% IM 10%
3.5 V 50%
VDDDEToff
tV
DDDET
tV
90%
DDDET
0% (<1.0 A)
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* The last state is "Z". Figure 2. tPLH, tPHL, and tPZH Timing Figure 3. Low-Voltage Detection Timing
Table 1. Truth Table
INPUT EN H H H H L H H IN1 L H L H X X X IN2 L L H H X X X GIN X X X X X L H OUT1 Z H L L L X X OUTPUT OUT2 Z L H L L X X GOUT X X X X L H L
H = High. L = Low. Z = High impedance. X = Don't care. The GIN terminal and EN terminal are pulled up to VDD with internal resistance.
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
17510 7
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SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 17510 is a monolithic H-Bridge power IC applicable to small DC motors used in portable electronics. The 17510 can operate efficiently with supply voltages as low as 2.0 V to as high as 15 V, and it can provide continuos motor drive currents of 1.2 A while handling peak currents up to 3.8 A. It is easily interfaced to low-cost MCUs via parallel 5.0 V-compatible logic. The device can be pulse width modulated (PWM-ed) at up to 200 kHz. The 17510 has four operating modes: Forward, Reverse, Brake, and Tri-Stated (High Impedance). Basic protection and operational features (direction, dynamic braking, PWM control of speed and torque, main power supply undervoltage detection and shutdown, logic power supply undervoltage detection and shutdown), in addition to the 1.0 A rms output current capability, make the 17510 a very attractive, cost-effective solution for controlling a broad range of small DC motors. In addition, a pair of 17510 devices can be used to control bipolar stepper motors. The 17510 can also be used to excite transformer primary windings with a switched square wave to produce secondary winding AC currents. As shown in Figure 1, 17510 Simplified Internal Block Diagram, page 2, the 17510 is a monolithic H-Bridge with builtin charge pump circuitry. For a DC motor to run, the input conditions need to be set as follows: ENable input logic HIGH, one INput logic LOW, and the other INput logic HIGH (to define output polarity). The 17510 can execute dynamic braking by setting both IN1 and IN2 logic HIGH, causing both low-side MOSFETs in the output H-Bridge to turn ON. Dynamic braking can also implemented by taking the ENable logic LOW. The output of the H-Bridge can be set to an open-circuit highimpedance (Z) condition by taking both IN1 and IN2 logic LOW. (refer to Table 1, Truth Table, page 7). The 17510 outputs are capable of providing a continuous DC load current of up to 1.2 A. An internal charge pump supports PWM frequencies to 200 kHz. The EN terminal also controls the charge pump, turning it off when EN = LOW, thus allowing the 17510 to be placed in a power-conserving sleep mode.
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FUNCTIONAL TERMINAL DESCRIPTION OUT1 and OUT2
The OUT1 and OUT2 terminals provide the connection to the internal power MOSFET H-Bridge of the IC. A typical load connected between these terminals would be a small DC motor. These outputs will connect to either VM or PGND, depending on the states of the control inputs (refer to Table 1, Truth Table, page 7). terminals must be connected together on the printed circuit board with as short as possible traces offering as low impedance as possible between terminals. VM has an undervoltage threshold. If the supply voltage drops below the undervoltage threshold, the output power stage switches to a tri-state condition. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input terminals.
PGND and LGND
The power and logic ground terminals (PGND and LGND) should be connected together with a very low-impedance connection.
IN1, IN2, and EN
The IN1, IN2, and EN terminals are input control terminals used to control the outputs. These terminals are 5.0 V CMOScompatible inputs with hysteresis. The IN1, IN2, and EN work together to control OUT1 and OUT2 (refer to Table 1, Truth Table).
CRES
The CRES terminal provides the connection for the external reservoir capacitor (output of the charge pump). Alternatively this terminal can also be used as an input to supply gate-drive voltage from an external source via a series current-limiting resistor. The voltage at the CRES terminal will be approximately three times the VDD voltage, as the internal charge pump utilizes a voltage tripler circuit. The VCRES voltage is used by the IC to supply gate drive for the internal power MOSFET H-Bridge.
GIN
The GIN input controls the GOUT terminal. When GIN is set logic LOW, GOUT supplies a level-shifted high-side gate drive signal to an external MOSFET. When GIN is set logic HIGH, GOUT is set to GND potential.
C1L and C1H, C2L and C2H
These two pairs of terminals, the C1L and C1H and the C2L and C2H, connect to the external bucket capacitors required by the internal charge pump. The typical value for the bucket capacitors is 0.1 F.
VM
The VM terminals carry the main supply voltage and current into the power sections of the IC. This supply then becomes controlled and/or modulated by the IC as it delivers the power to the load attached between OUT1 and OUT2. All VM
17510 8
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GOUT
The GOUT output terminal provides a level-shifted, high-side gate drive signal to an external MOSFET with Ciss up to 500 pF.
VDD
The VDD terminal carries the 5.0 V supply voltage and current into the logic sections of the IC. VDD has an
undervoltage threshold. If the supply voltage drops below the undervoltage threshold, the output power stage switches to a tri-state condition. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input terminals.
APPLICATIONS Typical Application
Figure 4 shows a typical application for the 17510.
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5.0 V 17510 VDD C1L C1H C2L C2H CRES EN GIN IN1 IN2 GND VM GOUT
OUT1 Motor OUT2
Solenoid
MCU
Figure 4. 17510 Typical Application Diagram
CEMF Snubbing Techniques
Care must be taken to protect the IC from potentially damaging CEMF spikes induced when commutating currents in inductive loads. Typical practice is to provide snubbing of voltage transients by placing a capacitor or zener at the supply terminal (VM) (see Figure 5).
5.0 V 15 V 17510 VM VDD C1L OUT1 C1H C2L C2H CRES OUT2 GND
5.0 V
15 V
17510 VM VDD C1L OUT1 C1H C2L C2H CRES OUT2 GND
Figure 5. CEMF Snubbing Techniques
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
17510 9
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PACKAGE DIMENSIONS
MTB SUFFIX EJ (Pb-FREE) SUFFIX 24-LEAD TSSOP WIDE BODY PLASTIC PACKAGE CASE 948K-01 ISSUE O
24X
K
REF M
0.10 (0.004) 0.15 (0.006) T U
S
TU
S
V
S
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2X
L/2
24
13
L
PIN 1 IDENT. 1 12
B -U-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 7.70 7.90 5.50 5.70 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 7.60 BSC 0 8 INCHES MIN MAX 0.303 0.311 0.216 0.224 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.299 BSC 0 8
0.15 (0.006) T U
S
A -V-WG DETAIL E H
C 0.10 (0.004) -TSEATING PLANE
D
DIM A B C D F G H J J1 K K1 L M
N
0.25 (0.010) M
N F DETAIL E
17510 10
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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NOTES
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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
17510 11
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Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. MOTOROLA and the Stylized M Logo are registered in the US Patent and Trademark Office. All other product or service names are the property of their respective owners. (c) Motorola, Inc. 2004 HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors
MPC17510
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